﻿#ifndef __GLOBAL_H__
#define __GLOBAL_H__

#include "../global/ObasicTypes.h"
#include <iostream>
#include <vector>
#include <map>
#include<arpa/inet.h>
#include <mutex>
#include <ctime>

#define TIMEOUT_SEC		                        3                  // TCP/UDP通讯超时时间

using namespace std;
extern Ouint8 g_set_led_para ;
extern Ouint8 g_set_led_setup ;
extern Ouint8 g_freeze_out;
extern Ouint32 g_fpga_c331_start;
extern Ouint8  g_force_bkcolor;     //bit0=强迫蓝屏
extern Ouint8  ScreenState;
extern Ouint32 G_timeTicks;
extern Ouint32 G_reboot_tickTicks;
extern Ouint32 readtime_ticks;
extern Ouint8 pc_cmd_valid ;
extern Ouint8 g_power_open_running;
extern Ouint8 g_power_close_running;
extern Ouint32 pc_cmd_time;
extern bool g_update_flag;
extern bool g_tip_flag;
extern bool g_app_reset_flag;
extern Ouint8 g_update_status;
extern Ouint8 fileBuf_onbon[5*1024*1024];

//about flash addr
// typedef enum{
//       FLASH_SEC_SIZE =  4096, //用于扇区的读写
// #if (FPGA_OUT_8X == 1 )
//       PARAM1_SEC = 1728,//441//442//(127)  //参数区1
//       PARAM1_SEC_ADDR = (PARAM1_SEC*FLASH_SEC_SIZE),

//       RAM1_SEC = 1735,         //LCD para
//       RAM1_ADD =  (RAM1_SEC*FLASH_SEC_SIZE),

//       TIME_FLAG =   1775,    //工程运行标志区
//       TIME_FLAG_ADD = (TIME_FLAG*FLASH_SEC_SIZE) ,


//       ONOFF_SEC = 1741,//893//396     //定时开关参数区
//       ONOFF_ADD = (ONOFF_SEC*FLASH_SEC_SIZE),
//       BRIGHT_SEC = 1742,//894//397     //调亮参数区
//       BRIGHT_ADD = (BRIGHT_SEC*FLASH_SEC_SIZE),

//       RAM_PARA_START_SEC = 1735,//886//384			//!<RAM参数
//       RAM_PARA_END_SEC = 1735,//886//384			//!<RAM参数

//       PC_NET_PARA_SEC = 1776,//922//(482) //PC备用扇区 用于PC记录网口参数
// #else
//       PARAM1_SEC = 769,//441//442//(127)  //参数区1
//       PARAM1_SEC_ADDR = (PARAM1_SEC*FLASH_SEC_SIZE),

//       RAM1_SEC = 776,         //LCD para
//       RAM1_ADD =  (RAM1_SEC*FLASH_SEC_SIZE),

//       TIME_FLAG =   816,    //工程运行标志区
//       TIME_FLAG_ADD = (TIME_FLAG*FLASH_SEC_SIZE) ,

//       ONOFF_SEC = 782,//893//396     //定时开关参数区
//       ONOFF_ADD = (ONOFF_SEC*FLASH_SEC_SIZE),

//       BRIGHT_SEC = 783,//894//397     //调亮参数区
//       BRIGHT_ADD = (BRIGHT_SEC*FLASH_SEC_SIZE),

//       RAM_PARA_START_SEC = 776,//886//384			//!<RAM参数
//       RAM_PARA_END_SEC = 776,//886//384			//!<RAM参数

//       PC_NET_PARA_SEC = 817,//922//(482) //PC备用扇区 用于PC记录网口参数
// #endif




//       RAM_PARA_BASE_ADD	= (Ouint32)(RAM_PARA_START_SEC*FLASH_SEC_SIZE) ,//!<MCU 中 RAM 参数的保存位置。

//       PC_NET_PARA_ADDR = (PC_NET_PARA_SEC*FLASH_SEC_SIZE),


//     //c331 fpga flash

//     C331_FLASH_SEC_MAX = 8192,//2048,//8M
//     C331_FLASH_MAX_ADDR = (FLASH_SEC_SIZE*C331_FLASH_SEC_MAX),

//         //FPGA1 FLASH 8M
//        FPGA_FLASH_VBYONE1_SEC_MAX = 2048,//8M
//        FPGA_FLASH_VBYONE1_MAX_ADDR = (FLASH_SEC_SIZE*FPGA_FLASH_VBYONE1_SEC_MAX),

//         //FPGA2 FLASH
//        FPGA_FLASH_VBYONE2_SEC_MAX =	2048,
//        FPGA_FLASH_VBYONE2_MAX_ADDR	= (FPGA_FLASH_VBYONE2_SEC_MAX*FLASH_SEC_SIZE),


//         SOURCE_CHIP_SEC_MAX = 16,
//         SOURCE_CHIP_FLASH_MAX_ADDR	= (SOURCE_CHIP_SEC_MAX*FLASH_SEC_SIZE)

// }OVP_FPGA_FLASH_ADDR_PARA;



//about flash cmd
typedef enum{
    ERASE_4K = 0,
    ERASE_32K =	1,
    ERASE_64K =	2,

    SPI_FLASH_CMD_ERASE_4K = 0x20,
    SPI_FLASH_CMD_ERASE_32K = 0x52,
    SPI_FLASH_CMD_ERASE_64K = 0xD8,
    SPI_FLASH_CMD_READ = 0x03,
    SPI_FLASH_CMD_READ_UID = 0x4B,
    SPI_FLASH_CMD_FAST_READ = 0x0B,
    SPI_FLASH_CMD_READ_STATUS1 = 0x05,

    SPI_FLASH_CMD_WRITE_STATUS1 = 0x01,
    SPI_FLASH_CMD_WRITE_STATUS2 = 0x31,

    SPI_FLASH_CMD_WRITE = 0x02,
    SPI_FLASH_CMD_WRITE_ENABLE = 0x06

} ONBON_SPI_FLASH_CMD;




typedef struct{

    //uint32 sys_secret_flag;
    //uint32 sys_led_run_time;
    //uint32 sys_led_run_err;1

    //uint32 sys_pcb_ver;
    //uint32 sys_dvi_check_time;
    //uint32 sys_6801_init_state;
    Ouint32 sys_FPGA_init_flag;
    //uint32 sys_6801_test;

    Ouint32 sys_search_task;
    Ouint32 sys_search_check_time;
    Ouint32 sys_check_vbo_status_ticks[2];
    Ouint32 sys_search_state;
    Ouint32 sys_search_result;
    Ouint32 sys_search_port_flag;

    //#ifdef CONCURRENT_ENABLE
    Ouint32 sys_search_times;          //!<搜索次数
    //#endif

    //uint32 sys_run_ok_time;
    //uint32 sys_run_ok_flag;

    //uint32 sys_dvi_sign_state;
    //uint32 sys_dvi_port_value;
    //uint32 sys_ic_input_valid_time;

    //uint32 sys_port0_rcv_num ;
    //uint32 sys_port1_rcv_num ;

    Ouint32 sys_Bri_result;
    Ouint32 sys_hand_Bri_time;
    Ouint32 sys_hand_Bri_save_time;
    Ouint32 sys_hand_Bri_state;
    Ouint32 sys_hand_Bri_flag;
    //uint32 sys_hand_Bri_port_flag;
    //uint32 sys_hand_txc_num;
    Ouint32 sys_Bri_task;
    Ouint32 sys_Bri_task_time;
    Ouint32 sys_Bri_value;
    Ouint32 sys_Bri_change;
    Ouint32 sys_Bri_times;
    Ouint32 sys_Bri_rcv_num;
    Ouint32 sys_Bri_rcv_change;

    Ouint32 sys_Power_ctrl_enable;
    Ouint32 sys_power_delay_time;
    Ouint32 sys_power_check_time;
    Ouint32 sys_power_send_time;
    Ouint32 sys_signal_check_time;

    Ouint32 fun_Bri_check_num;     //!<检查计数，若超过10次未能获取亮度值，回到默认值

    Ouint32 sys_VMF_group;         //!<网口1~网口4为第一组，网口5~网口8为第二组
    Ouint32 sys_VMF_port;
    Ouint32 sys_VMF_data_valid;

    Ouint32 sys_send_cmd_value;
    Ouint32 sys_send_cmd_result;

    //uint32 sys_msg_tx_state;
    //uint32 sys_msg_tx_err;
    //uint32 sys_msg_cmd;
    //uint32 sys_msg_ovp_seq;
    //uint32 sys_msg_ovp_cmd;
    //uint32 sys_msg_ovp_addr;
    //uint32 sys_msg_ovp_rcv_len;
    //uint32 sys_ovp_rst_flag;
    //uint32 sys_ovp_rst_time;
    Ouint32 sys_fpga_ret_time[2];

    //uint32 sys_dvi_flag;
    //uint32 sys_dvi_time;
    //uint32 sys_edid_change;
    //uint32 sys_edid_time;

    //uint32 sys_fpga_updata;
    //uint32 sys_wtd_flag;
    //uint32 sys_wtd_time;

    //uint32 sys_FPGA_line_time;
    //uint32 sys_FPGA_line_state;//!<FPGA 级联总结状态 01寄存器在M1X未使能 默认为0即可
    //uint32 sys_VSE_master_flag;//!<FPGA 由于主/从机模式 默认为主机就
    //uint32 sys_VSE_addr;
    Ouint32 sys_data_in_line;
    Ouint32 sys_data_out_line;

    Ouint32 sys_reg_flag[2];

    //uint32 sys_comm_time;
    //uint32 sys_start_delay_time;
    Ouint32 sys_fpga_delay_time[2];
    Ouint32 sys_fpga_check_net_para_ticks[2];//by G32
    Ouint32 sys_fpga_check_net_flag[2];//by G32
    //uint32 sys_signal_check_time;
    //uint32 sys_resolution_check_time;
    //uint32 sys_fpga_communite_enable[2];   //表示此时间段内禁止FPGA通讯
    //uint32 sys_wait_send_time;
    //uint32 sys_wait_send_time1[16];//DEVICE_OUT_NUM

    //uint32 res_W;
    //uint32 res_H;

    //uint32 pix_W;
    //uint32 pix_H;

    Ouint32 sys_power_init;
    Ouint32 sys_fpga_check_init_ticks;
    Ouint32 sys_record_second;

    Ouint32 sys_fpga_check_ticks[2];

}Struct_sys_change;


extern Struct_sys_change   g_change;




/*
 *  数据转换
 */
#define	BCD_to_HEC(b)	((((b)>>4)*10)+((b)&0x0f))
#define	HEC_to_BCD(h)	((((h)/10)<<4)|((h)%10))
#define SPLIT_8_to_16(p,x)   ((p[x])|(p[x+1]<<8))
#define SPLIT_8_to_32_LITTLE(p,x)   ((p[x])|(p[x+1]<<8)|(p[x+2]<<16)|(p[x+3]<<24))
#define INIT_16_to8(d,p,x) \
                            do{\
                            Ouint16 d1;\
                            d1 = d;\
                            ((p)[x]=((d1)&0xff));\
                            ((p)[x+1]=(((d1)>>8)&0xff));\
                            }while(0)



typedef struct{
    Ouint8	second;
    Ouint8	minute;
    Ouint8	hour;
    Ouint8	date;
    Ouint8	week;
    Ouint8	month;
    Ouint8 	year;
}TimeBCDType;

typedef struct{
    Ouint8	second;
    Ouint8	minute;
    Ouint8	hour;
    Ouint8	date;
    Ouint8	week;
    Ouint8	month;
    Ouint16 	year;
}TimeRealType;


typedef struct{
    Ouint8 operation;
    Ouint8 target;
    string dataFile;
    Ouint8 mask;
    Ouint8 value;
    Ouint32 targetAddr;
    Ouint32 targetAddroffset;
    Ouint32 dataOffset;
    Ouint32 dataLen;
    Ouint32 timeout;
}SCAN_PARA;












#endif //__GLOBAL_H__

